Join Azure at the Design Automation Conference (DAC)

The Azure High-Performance Computing (HPC) solution enables experts in silicon design by providing them the infrastructure and tools for chip design, IP design, silicon manufacturing, and silicon supply chain. Creating cutting-edge technologies requires extreme amounts of compute power, and as our customers face additional unique threats and challenges made worse by the pandemic, the Azure cloud can solve many of these by providing a secure, scalable platform that was built for HPC. Customers are increasingly using the Azure HPC platform to boost productivity, optimize resources, speed up time to market, and increase resourcing. AMD for example is using the Azure platform in combination with the HBv3 virtual machines to achieve better quality designs, speed up time to market, and increase capacity by bursting to the cloud.

We recently announced a preview for Azure HBv3 virtual machines enhanced by 3rd Gen AMD EPYCTM processors with 3D V-cache, codenamed “Milan-X.” These enhancements continue us on the path to becoming the best platform in the world for silicon design, by improving the performance, scaling efficiency, and cost-effectiveness of a variety of memory performance-bound workloads like RTL simulation workloads. Customers using Milan-X will experience up to 60 percent higher performance for RTL simulation, and the upgrade will be provided at zero cost beyond existing HBv3-series VMs, and with no changes required of customer workloads. In addition, all HBv3-series VMs globally will soon be upgraded with Milan-X processors. For more information, read the announcement and in-depth performance content.

In June, we announced the general availability of the FX-series virtual machines, powered by 2nd Generation Intel Xeon Scalable Processors. Designed for workloads demanding very high single-threaded and lightly threaded performance, these are ideal for Electronic Design Automation (EDA). The new FX-series virtual machines deliver up to a 19 percent better performance over FSv2-series virtual machines, with 1008 GB of RAM (42 GB per physical core), 2 TB of attached NVMe SSD, a single-core frequency of 4.1 GHz, a base frequency of 3.4 GHz, and an all-core-turbo frequency of 4.0 GHz. Additionally, customers needing additional per-CPU core performance can turn off hyper-threading. Read additional information about the FX-series virtual machines.

We will be at the Design Automation Conference (DAC) in person and can’t wait to see you there.

Sessions you don’t want to miss


Monday, December 6 | 1:00 PM Pacific Time (PT)
William Chappel, Azure Global
Semiconductors are deeply embedded in every aspect of our lives, and recent security threats and global supply chain challenges have put a spotlight on the industry. Significant investments are being made both by nation states and commercial industry to manage supply chain dependencies, ensure integrity, and build secure, collaborative environments to foster growth. These shifts provide unique opportunities for our industry. This talk blends insights and experiences from government initiatives and Azure's Special Capabilities and Infrastructure programs, to outline how cloud and AI technologies, along with tool vendors, fabless semiconductor companies, IP providers, foundries, equipment manufacturers, and other ecosystem stakeholders can contribute to building a robust, end-to-end, secure silicon supply chain for both commercial and government applications, while generating value for their businesses.

Design/IP/Embedded Track (DIET)

Monday, December 6 | 10:30 AM Pacific Time (PT)
Moderator: Preeth Chengappa, Sr. Director, Semi and EDA, Azure Global

Industry panel: Prashant Varshney, Head of Product, Silicon, Azure Global; Phillip Steinke, Fellow, CAD Infrastructure and Physical Design, AMD; Michael Hale, Senior Infrastructure Architecture, NVIDIA; Derek Magill, CEO and Co-Founder of License Foundry and HPC Solutions Architect at Flux7; Sridhar Panchapakesan, Program Management Director for Cloud Engagements, Synopsys.

Join us for a live panel as experts from Microsoft, NVIDIA, Synopsys, License Foundry, and Flux7 discuss the real advantages and challenges of running chip design in the cloud.

Design on Cloud Theater—Azure

Tuesday, December 7 | 10:30 AM Pacific Time (PT)
Learn how Microsoft Azure’s silicon organization is using Azure to enable its semiconductor development. We will cover how the team uses Azure DevOps capabilities, along with GIT, to manage design information and leverage Azure HPC to run their EDA workloads.

At the booth

Visit us at our booth in the Design Infrastructure Alley to meet experts from Microsoft, AMD, and Pure Storage. Check out the latest Azure HBv3 and Pure Storage FlashBlade hardware at our hardware exhibit.

Join us for some bite-sized sessions at our mini-theater featuring speakers from customers and industry partners including AMD, ANSYS, Cadence, Pure Storage, Rescale, Siemens EDA, and Synopsys.




10:15 AM–10:30 AM



11:15 AM–11:30 AM



12:15 PM–12:30 PM



1:15 PM–1:45 PM



2:00 PM–2:30 PM



3:15 PM–3:30 PM



4:15 PM–4:30 PM



How our customers are using Azure

AMD IT satisfies an insatiable appetite for capacity, scalability, and innovation with Azure HPCImage of AMD logo

As a leader in semiconductor, computer processors, and related technologies, AMD has a responsibility to serve its customers, keep pace with the industry, and help set the standard for how servers, computers, and embedded systems run. To maintain its execution track record, the IT team at AMD used Microsoft Azure high-performance computing (HPC), HBv3 virtual machines, and other Azure resources to build scalable capacity and optimize the company’s cloud capabilities, accelerating time to market and eliminating weeks and even months of delay.

Don’t miss the video playing at the Microsoft Azure booth.

Learn More

Source: Azure Blog Feed

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